Our goal
\nTo increase + open up new vectors of progress in the field of computing by bringing the cost of AI hardware down by >1000x
\n\n
Why this programme
\nOur current mechanisms for training AI systems utilise a narrow set of algorithms and hardware building blocks, which require significant capital to develop and manufacture. The combination of this significance and scarcity has far-reaching economic, geopolitical, and societal implications.
\n\n
What we’re shooting for
\nWe see an opportunity to draw inspiration from natural processing systems, which innately process complex information more efficiently (on several orders of magnitude) than today's largest AI systems.
\nUnlocking a new technological lever for next-generation AI hardware, alleviating dependence on leading-edge chip manufacturing, and opening up new avenues to scale AI hardware – an industry which is worth trillions of pounds.
\n\n\n
Read the accessible version of the programme thesis
","mediumLayout":false,"fullWidth":false},{"type":"spacer-comp","cssSizeClass":"medium","height":0},{"type":"quote","quote":"\"Modern AI algorithms offer an opportunity to exploit principles found in nature to dramatically reduce the cost of the underlying computational hardware. If we can do this, we can fundamentally alter the existing supply chain, improve access to an increasingly important technology, and open up new use cases with massive societal benefit.\"
","author":"Suraj Bramhavar","role":"Programme Director","image":{"src":"/media/nkfhgmi0/suraj-pd-1.jpg?width=600&height=750&format=webp&v=1db3acc1503c6b0","alt":"Suraj PD 1"}},{"cards":[{"title":"Charting the Course","text":"Developing software simulators to help the research community map the expected performance/power/cost for any future combination of algorithm, hardware, componentry, and system scale.","step":"1"},{"title":"Advanced Networking and Interconnect","text":"We know the movement of data has become as critical as raw computational power, so we’re funding two projects to interrogate system-level and advanced network design opportunities.","step":"2"},{"title":"New Computational Primitives","text":"Developing new technologies with the potential to open up new vectors of progress for the field of computing, with a targeted relevance for modern AI algorithms.","step":"3"}],"type":"numbered-cards","heading":"Pillars","subHeading":"This programme is split into four pillars, each with its own distinct objectives."},{"type":"spacer-comp","cssSizeClass":"small","height":0},{"type":"team-cards","items":[{"image":{"src":"/media/nkfhgmi0/suraj-pd-1.jpg?width=1000&height=1000&format=webp&v=1db3acc1503c6b0","alt":"Suraj PD 1"},"name":"Suraj Bramhavar","text":"Suraj is an electrical engineer. His work focuses on how we can redefine the way computers process information to build dramatically more efficient computers. Suraj joined ARIA from Sync Computing, where he was co-founder and CTO, which optimises the use of modern cloud computing resources. ","position":"Programme Director"},{"image":{"src":"/media/vs0m2g4l/david-stinger.jpg?rxy=0.5268806990881459,0.44546580919900786&width=1000&height=1000&format=webp&v=1db4d567a535750","alt":"A photo of David Stringer smiling in front of a grey wall."},"name":"David Stringer","text":"David trained as a chemist at UCL before working in materials science at Imperial College London, developing nanocarbon devices for sensing, photovoltaics, and energy storage. Prior to ARIA, he built sales and operations functions at early-stage startups focusing on physics-based software for automotive and consumer electronics industries. David supports ARIA as an Operating Partner from Pace.","position":"Programme Specialist"},{"image":{"src":"/media/bhsec30e/paolo-toccaceli.jpg?rxy=0.5429013332115789,0.4632387742634959&width=1000&height=1000&format=webp&v=1db4d5671e9b730","alt":"A photo of Paolo Toccaceli smiling in front of a white wall."},"name":"Paolo Toccaceli","text":"Paolo is an electronic engineer by training, and has spent majority of his professional career in technical R&D roles for large high-tech companies, such as HP and Alcatel-Lucent. He returned to academia to earn a PhD in Machine Learning, then joined Graphcore, a startup that develops innovative AI hardware.","position":"Technical Specialist"}],"title":"Meet the programme team","text":"Our Programme Directors are supported by a Programme Specialist (P-Spec) and Technical Specialist (T-Spec); this is the nucleus of each programme team. P-Specs co-ordinate and oversee the project management of their respective programmes, whilst T-Specs provide highly specialised and targeted technical expertise to support programmatic rigour.
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\nARIA's Scaling Compute programme aims to revolutionize AI hardware by funding projects that explore alternative computing methods inspired by natural systems, targeting a 1000x reduction in AI hardware costs.
\nBy uniting experts across AI systems design, mixed-signal CMOS circuits, and advanced networking, ARIA seeks to redefine current computing paradigms and alleviate dependence on leading-edge chip manufacturing. The initiative reflects ARIA's commitment to catalysing scientific progress and creating new communities and industries in the field of computing.
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